Issued Patents 2020
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10831607 | Dynamic transaction throttling in a data processing system supporting transactional memory | Derek E. Williams, Hugh Shen, Sanjeev Ghai, Hung Q. Doan | 2020-11-10 |
| 10831660 | Ordering execution of an interrupt handler | Derek E. Williams, Hugh Shen | 2020-11-10 |
| 10824567 | Selectively preventing pre-coherence point reads in a cache hierarchy to reduce barrier overhead | Derek E. Williams, Hugh Shen, William J. Starke | 2020-11-03 |
| 10740239 | Translation entry invalidation in a multithreaded data processing system | Derek E. Williams, Hugh Shen | 2020-08-11 |
| 10733102 | Selectively updating a coherence state in response to a storage update | Derek E. Williams | 2020-08-04 |
| 10725937 | Synchronized access to shared memory by extending protection for a store target address of a store-conditional request | Derek E. Williams, Hugh Shen, Sanjeev Ghai | 2020-07-28 |
| 10705957 | Selectively updating a coherence state in response to a storage update | Derek E. Williams | 2020-07-07 |
| 10691605 | Expedited servicing of store operations in a data processing system | Hugh Shen, Jeffrey A. Stuecheli, Derek E. Williams | 2020-06-23 |
| 10691599 | Selectively updating a coherence state in response to a storage update | Derek E. Williams | 2020-06-23 |
| 10671537 | Reducing translation latency within a memory management unit using external caching structures | Jody B. Joyner, Ronald Nick Kalla, Michael S. Siegel, Jeffrey A. Stuecheli, Charles D. Wait +1 more | 2020-06-02 |
| 10649902 | Reducing translation latency within a memory management unit using external caching structures | Jody B. Joyner, Ronald Nick Kalla, Michael S. Siegel, Jeffrey A. Stuecheli, Charles D. Wait +1 more | 2020-05-12 |
| 10649901 | Victim cache line selection | Bernard C. Drerup, Jeffrey A. Stuecheli, Phillip G. Williams | 2020-05-12 |
| 10649853 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Naresh Nayar, Geraint North, Hugh Shen, William J. Starke, Phillip G. Williams | 2020-05-12 |
| 10642760 | Techniques for command arbitation in symmetric multiprocessor systems | Charles F. Marino, Praveen S. Reddy | 2020-05-05 |
| 10635766 | Simulation employing level-dependent multitype events | Hugh Shen, Derek E. Williams | 2020-04-28 |
| 10613979 | Accelerator memory coherency with single state machine | Kenneth M. Valk, Derek E. Williams, Michael S. Siegel, John D. Irish | 2020-04-07 |
| 10613980 | Coherence protocol providing speculative coherence response to directory probe | David J. Krolak, Michael S. Siegel, Derek E. Williams | 2020-04-07 |
| 10613792 | Efficient enforcement of barriers with respect to memory move sequences | Bradly G. Frey, Cathy May, William J. Starke, Derek E. Williams | 2020-04-07 |
| 10579527 | Remote node broadcast of requests in a multinode data processing system | Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli, Derek E. Williams | 2020-03-03 |
| 10572179 | Speculatively performing memory move requests with respect to a barrier | Derek E. Williams | 2020-02-25 |