Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10853167 | Memory apparatus having hierarchical error correction code layer | Ming-Huei Shieh, Chi-Shun Lin, Seow Fong Lim, Ngatik Cheung | 2020-12-01 |
| 10811092 | RRAM with plurality of 1TnR structures | Chi-Shun Lin, Douk-Hyoun Ryu, Ming-Huei Shieh, Seow Fong Lim | 2020-10-20 |
| 10783973 | Memory device having parameter adjusting mechanism and method of adjusting parameter by memory device | Chi-Shun Lin | 2020-09-22 |