Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10714163 | Methods for mitigating transistor aging to improve timing margins for memory interface signals | Chee Hak Teh, Tick Sern Loh, Wilfred Wee Kee King, Yu Ying Ong | 2020-07-14 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10714163 | Methods for mitigating transistor aging to improve timing margins for memory interface signals | Chee Hak Teh, Tick Sern Loh, Wilfred Wee Kee King, Yu Ying Ong | 2020-07-14 |