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Gate-all-around fin device |
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Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers |
James P. Di Sarro, Robert J. Gauthier, Jr., Nathan Jack, Junjun Li |
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Structures, methods and applications for electrical pulse anneal processes |
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Semiconductor devices having a fin channel arranged between source and drift regions and methods of manufacturing the same |
Robert J. Gauthier, Jr., Alain Loiseau, Tsai Tsung-Che, Mickey H. Yu, You Li |
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Silicon-controlled rectifiers with wells laterally isolated by trench isolation regions |
Alain Loiseau, You Li, Mickey H. Yu, Tsung-Che Tsai, Robert J. Gauthier, Jr. |
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Gate-all-around fin device |
John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Mujahid Muhammad |
2020-05-19 |
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Gate-all-around fin device |
John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Mujahid Muhammad |
2020-03-17 |
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Gate-all around fin device |
John B. Campi, Jr., Robert J. Gauthier, Jr., Rahul Mishra, Mujahid Muhammad |
2020-02-25 |
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Electrostatic discharge devices with reduced capacitance |
Mickey H. Yu, Alain Loiseau, You Li, Robert J. Gauthier, Jr., Tsung-Che Tsai |
2020-01-21 |