| 10872393 |
Image processor with high throughput internal communication protocol |
Jason Redgrave, Albert Meixner, Qiuling Zhu, Ji Kim, Artem Vasilyev |
2020-12-22 |
| 10789202 |
Image processor with configurable number of active cores and supporting internal network |
Jason Redgrave, Albert Meixner, Ji Kim |
2020-09-29 |
| 10791284 |
Virtual linebuffers for image signal processors |
Qiuling Zhu, Jason Redgrave, Daniel Frederic Finchelstein, Albert Meixner |
2020-09-29 |
| 10789505 |
Convolutional neural network on programmable two dimensional image processor |
David Patterson, William R. Mark, Albert Meixner, Daniel Frederic Finchelstein, Jason Redgrave |
2020-09-29 |
| 10754654 |
Energy efficient processor core architecture for image processor |
Albert Meixner, Jason Redgrave, Daniel Frederic Finchelstein, Qiuling Zhu |
2020-08-25 |
| 10719905 |
Architecture for high performance, power efficient, programmable image processing |
Qiuling Zhu, Albert Meixner, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more |
2020-07-21 |
| 10638073 |
Line buffer unit for image processor |
Neeti Desai, Albert Meixner, Qiuling Zhu, Jason Redgrave, Daniel Frederic Finchelstein |
2020-04-28 |
| 10560598 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Qiuling Zhu, Daniel Frederic Finchelstein |
2020-02-11 |
| 10546211 |
Convolutional neural network on programmable two dimensional image processor |
David Patterson, William R. Mark, Albert Meixner, Daniel Frederic Finchelstein, Jason Redgrave |
2020-01-28 |
| 10531030 |
Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register |
Albert Meixner, Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave |
2020-01-07 |