Issued Patents 2019
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10169517 | Methods and systems for reducing congestion in very large scale integrated (VLSI) chip design | Shashank Pal, Sandeep Vusirikapally, Nirosha Anumandla | 2019-01-01 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10169517 | Methods and systems for reducing congestion in very large scale integrated (VLSI) chip design | Shashank Pal, Sandeep Vusirikapally, Nirosha Anumandla | 2019-01-01 |