Issued Patents 2019
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10505039 | Semiconductor device and method for forming the same | Yu-Cheng Tung, Fu-Che Lee | 2019-12-10 |
| 10503069 | Method of fabricating patterned structure | Fu-Che Lee | 2019-12-10 |
| 10497704 | Buried word line structure and method of making the same | Ger-Pin Lin, Kuan-Chun Lin, Chi-Mao Hsu, Shu-Yen Chan, Shih-Fang Tzou +4 more | 2019-12-03 |
| 10490555 | Method of forming semiconductor memory device | Yi-Ching Chang, Fu-Che Lee, Chieh-Te Chen | 2019-11-26 |
| 10472731 | Semiconductor structure and method of forming the same | Fu-Che Lee, Ming-Feng Kuo | 2019-11-12 |
| 10475662 | Method of forming semiconductor device | Wei-Hsin Liu, Ying-Chih Lin, Jui-Min Lee, Gang-Yi Lin, Fu-Che Lee | 2019-11-12 |
| 10460939 | Patterning method | Fu-Che Lee, Hsin-Yu Chiang | 2019-10-29 |
| 10446554 | Semiconductor memory device and method of forming the same | Fu-Che Lee, Chieh-Te Chen | 2019-10-15 |
| 10438842 | Method of fabricating contact hole | Shih-Fang Tzou, Fu-Che Lee, Hsin-Yu Chiang, Yu-Ching Chen | 2019-10-08 |
| 10431679 | Semiconductor device and method for forming the same | Yu-Cheng Tung, Fu-Che Lee | 2019-10-01 |
| 10418367 | Method for fabricating air gap adjacent to two sides of bit line | Yi-Ching Chang, Fu-Che Lee, Chieh-Te Chen | 2019-09-17 |
| 10396048 | Contact hole structure and fabricating method of contact hole and fuse hole | Fu-Che Lee, Chin-Hsin Chiu | 2019-08-27 |
| 10381239 | Method of forming semiconductor device | Fu-Che Lee | 2019-08-13 |
| 10381306 | Semiconductor memory device and a manufacturing method thereof | Shih-Fang Tzou, Fu-Che Lee, Chien-Cheng Tsai, Feng-Ming Huang | 2019-08-13 |
| 10373957 | Capacitor structure and fabrication method thereof | Fu-Che Lee, Yi-Wang Zhan, Chieh-Te Chen | 2019-08-06 |
| 10366889 | Method of forming semiconductor device | Fu-Che Lee, Chieh-Te Chen, Yi-Ching Chang | 2019-07-30 |
| 10366993 | Semiconductor structure having air gap between gate electrode and distal end portion of active area | Fu-Che Lee | 2019-07-30 |
| 10361080 | Patterning method | Fu-Che Lee, Chieh-Te Chen | 2019-07-23 |
| 10354876 | Semiconductor device and method of forming the same | Yu-Cheng Tung, Fu-Che Lee, Ying-Chih Lin | 2019-07-16 |
| 10347644 | Manufacturing method of semiconductor device | Fu-Che Lee, Chieh-Te Chen | 2019-07-09 |
| 10347642 | Manufacturing method of semiconductor memory device | Chien-Ting Ho, Shih-Fang Tzou, Fu-Che Lee | 2019-07-09 |
| 10332887 | Buried word line of a dynamic random access memory and method for fabricating the same | Chun-Hsien Lin, Fu-Che Lee | 2019-06-25 |
| 10332978 | Device with reinforced metal gate spacer and method of fabricating | Chia-Lin Lu, Yu-Cheng Tung, Chun-Lung Chen, Kun-Yuan Liao | 2019-06-25 |
| 10312090 | Patterning method | Fu-Che Lee, Chieh-Te Chen | 2019-06-04 |
| 10312088 | Self-aligned double patterning method | Fu-Che Lee, Ying-Chih Lin, Gang-Yi Lin | 2019-06-04 |