AS

Arunava Saha

SY Synopsys: 2 patents #24 of 330Top 8%
Overall (2019): #191,204 of 560,194Top 35%
2
Patents 2019

Issued Patents 2019

Patent #TitleCo-InventorsDate
10521536 RTL verification using computational complexity-based property ranking and scheduling Jinqing Yu, Manish Pandey, Ming-Ying Chung 2019-12-31
10503853 Formal verification using cached search path information to verify previously proved/disproved properties Himanshu Jain, Manish Pandey, Ashvin M. Dsouza, Per M. Bjesse 2019-12-10