SV

Satish Anand Verkila

CS Cadence Design Systems: 1 patents #113 of 394Top 30%
Overall (2019): #281,996 of 560,194Top 55%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10171270 Systems and methods for correcting for pre-cursor and post-cursor intersymbol interference in a data signal Vineeth Anavangot, Anil Kumar Ankam 2019-01-01