Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10362687 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Shinichi Iketani | 2019-07-23 |
| 10237983 | Method for forming hole plug | Shinichi Iketani | 2019-03-19 |
| 10188001 | Methods of forming high aspect ratio plated through holes and high precision stub removal in a printed circuit board | Douglas Ward Thomas, Shinichi Iketani | 2019-01-22 |