Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10423349 | Logical and physical address field size reduction by alignment-constrained writing technique | — | 2019-09-24 |
| 10360155 | Multi-tier memory management | Matthew Davidson, Eran Erez | 2019-07-23 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10423349 | Logical and physical address field size reduction by alignment-constrained writing technique | — | 2019-09-24 |
| 10360155 | Multi-tier memory management | Matthew Davidson, Eran Erez | 2019-07-23 |