Issued Patents 2019
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10474601 | Distributed fairness protocol for interconnect networks | Robert T. Golla, Mark Luttrell | 2019-11-12 |
| 10430342 | Optimizing thread selection at fetch, select, and commit stages of processor core pipeline | Yuan C. Chou, Gideon N. Levinsky, Robert T. Golla, Matthew B. Smittle | 2019-10-01 |
| 10346173 | Multi-threaded instruction buffer design | Jama I. Barreh, Robert T. Golla | 2019-07-09 |
| 10338928 | Utilizing a stack head register with a call return stack for each instruction fetch | Zeid H. Samoail | 2019-07-02 |
| 10318303 | Method and apparatus for augmentation and disambiguation of branch history in pipelined branch predictors | Jared C. Smolens | 2019-06-11 |
| 10255197 | Adaptive tablewalk translation storage buffer predictor | John D. Pape, Gideon N. Levinsky, Jared C. Smolens | 2019-04-09 |
| 10250059 | Charging circuit for battery-powered device | Yazan Aldehayyat, Ricardo Márquez Reyes | 2019-04-02 |
| 10198260 | Processing instruction control transfer instructions | Christopher H. Olson | 2019-02-05 |