Issued Patents 2019
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10360972 | Memories and memory components with interconnected and redundant data interfaces | Frederick A. Ware, Ely Tsern, John Eric Linstadt, Scott C. Best, Kenneth L. Wright | 2019-07-23 |
| 10331587 | Memory controller that uses a specific timing reference signal in connection with a data burst following a specified idle period | Ian Shaeffer | 2019-06-25 |
| 10320591 | Burst-tolerant decision feedback equalization | Abhijit Abhyankar | 2019-06-11 |
| 10304517 | Method and apparatus for calibrating write timing in a memory system | Alok Gupta, Ian Shaeffer, Steven C. Woo | 2019-05-28 |
| 10223309 | Dynamic random access memory (DRAM) component for high-performance, high-capacity registered memory modules | Frederick A. Ware, Ely Tsern, John Eric Linstadt, Kenneth L. Wright | 2019-03-05 |
| 10169258 | Memory system design using buffer(s) on a mother board | Chi-Ming Yeung, Yoshie Nakabayashi, Henry Stracovsky | 2019-01-01 |