Issued Patents 2019
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10516427 | PAM-4 DFE architectures with symbol-transition dependent DFE tap values | Nhat Nguyen, Yikui Jen Dong, Arash Zargaran-Yazd, Wendemagegnehu Beyene | 2019-12-24 |
| 10389303 | Integrated circuit comprising fractional clock multiplication circuitry | Farshid Aryanfar, Mohammad Hekmat, Reza Navid | 2019-08-20 |
| 10348480 | Collaborative clock and data recovery | Nhat Nguyen, Yikui Jen Dong, Arash Zargaran-Yazd | 2019-07-09 |
| 10298244 | Wide range frequency synthesizer with quadrature generation and spur cancellation | Farshid Aryanfar | 2019-05-21 |
| 10263761 | Clock and data recovery having shared clock generator | Brian S. Leibowitz, Jihong Ren | 2019-04-16 |
| 10230384 | Variable resolution digital equalization | Kenneth C. Dyer, Nhat Nguyen, Shankar Tangirala | 2019-03-12 |
| 10205458 | Run-time output clock determination | Jared L. Zerbe, Brian S. Leibowitz | 2019-02-12 |