Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10438646 | Apparatuses and methods for providing power for memory refresh operations | Harish N. Venkata | 2019-10-08 |
| 10395702 | Memory device with a clocking mechanism | Vijayakrishna J. Vankayala, Todd A. Dauenbaugh | 2019-08-27 |
| 10360959 | Adjusting instruction delays to the latch path in DDR5 DRAM | David D. Wilmoth | 2019-07-23 |
| 10354717 | Reduced shifter memory system | Vijayakrishna J. Vankayala, William C. Waldrop, Kallol Mazumder, Byung S. Moon, Ravi Kiran Kandikonda | 2019-07-16 |
| 10275437 | Structured document bounding language | Malcolm H. M. Holloway, Christopher J. Schaubach, Richard S. Szulewski, Lisa M. Bradley | 2019-04-30 |
| 10176858 | Adjusting instruction delays to the latch path in DDR5 DRAM | David D. Wilmoth | 2019-01-08 |