Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10325662 | Circuit and method for adjusting select gate voltage of non-volatile memory during erasure of memory cells based on a well voltage | Shin-Jang Shen, Wei-Jen Chen | 2019-06-18 |
| 10290364 | Memory integrated circuit with a page register/status memory capable of storing only a subset of row blocks of main column blocks | Chi Lo, Chun-Hsiung Hung | 2019-05-14 |