Issued Patents 2019
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10505034 | Vertical transistor using a through silicon via gate | Xiaodong Yang, Jui-Yen Lin, Kinyip Phoa, Nidhi Nidhi, Yi-Wei Chen +2 more | 2019-12-10 |
| 10355093 | Non-planar semiconductor device having omega-fin with doped sub-fin region and method to fabricate same | Gopinath Bhimarasetti, Joodong Park, Weimin Han, Raymond E. Cotner, Chia-Hong Jan | 2019-07-16 |
| 10355081 | Dielectric and isolation lower Fin material for Fin-based electronics | Chia-Hong Jan | 2019-07-16 |
| 10340220 | Compound lateral resistor structures for integrated circuitry | Chen-Guan Lee, Vadym Kapinus, Pei-Chi Liu, Joodong Park, Chia-Hong Jan | 2019-07-02 |
| 10340273 | Doping with solid-state diffusion sources for finFET architectures | Chia-Hong Jan, Jeng-Ya David Yeh, Hsu-Yu Chang, Neville L. Dias, Chanaka D. Munasinghe | 2019-07-02 |
| 10263112 | Vertical non-planar semiconductor device for system-on-chip (SoC) applications | Chia-Hong Jan, Curtis Tsai, Jeng-Ya David Yeh, Joodong Park | 2019-04-16 |
| 10243034 | Pillar resistor structures for integrated circuitry | Chen-Guan Lee, Chia-Hong Jan | 2019-03-26 |
| 10229866 | On-chip through-body-via capacitors and techniques for forming same | Yi-Wei Chen, Kinyip Phoa, Nidhi Nidhi, Jui-Yen Lin, Kun-Huan Shih +2 more | 2019-03-12 |
| 10229853 | Non-planar I/O and logic semiconductor devices having different workfunction on common substrate | Roman W. Olac-Vaw, Chia-Hong Jan, Pei-Chi Liu | 2019-03-12 |
| 10204999 | Transistor with airgap spacer | Chen-Guan Lee, Joodong Park, En-Shao Liu, Everett S. Cassidy-Comfort, Chia-Hong Jan | 2019-02-12 |
| 10192969 | Transistor gate metal with laterally graduated work function | Chia-Hong Jan, Hsu-Yu Chang, Roman W. Olac-Vaw, Ting Chang, Rahul Ramaswamy +2 more | 2019-01-29 |