Issued Patents 2019
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10511328 | Efficient list decoding of LDPC codes | Shrinivas Kudekar, Thomas Richardson, Gabi Sarkis | 2019-12-17 |
| 10476525 | Low latency bit-reversed polar codes | Gabi Sarkis, Hari Sankar, Joseph Binamira Soriaga, Yang Yang | 2019-11-12 |
| 10419027 | Adjusted min-sum decoder | Thomas Richardson, Shrinivas Kudekar | 2019-09-17 |
| 10340949 | Multiple low density parity check (LDPC) base graph design | Joseph Binamira Soriaga, Gabi Sarkis, Shrinivas Kudekar, Thomas Richardson | 2019-07-02 |
| 10312937 | Early termination technique for LDPC decoder architecture | Yi Cao, Girish Varatkar | 2019-06-04 |