Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10404444 | Systems and methods for the design and implementation of input and output ports for circuit design | Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong | 2019-09-03 |
| 10331835 | ASIC design methodology for converting RTL HDL to a light netlist | Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong | 2019-06-25 |
| 10181939 | Systems and methods for the design and implementation of an input and output ports for circuit design | Stefano Giaconi, Giacomo Rinaldi, Matheus Trevisan Moreira, David Fong | 2019-01-15 |