Issued Patents 2019
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10461118 | Method for making CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk | Yi-Ann Chen, Abid Husain | 2019-10-29 |
| 10453945 | Semiconductor device including resonant tunneling diode structure having a superlattice | Robert J. Mears, Marek Hytha | 2019-10-22 |
| 10410880 | Semiconductor device including a superlattice as a gettering layer | — | 2019-09-10 |
| 10396223 | Method for making CMOS image sensor with buried superlattice layer to reduce crosstalk | Yi-Ann Chen, Abid Husain | 2019-08-27 |
| 10381242 | Method for making a semiconductor device including a superlattice as a gettering layer | — | 2019-08-13 |
| 10367028 | CMOS image sensor including stacked semiconductor chips and image processing circuitry including a superlattice | Yi-Ann Chen, Abid Husain | 2019-07-30 |
| 10355151 | CMOS image sensor including photodiodes with overlying superlattices to reduce crosstalk | Yi-Ann Chen, Abid Husain | 2019-07-16 |
| 10304881 | CMOS image sensor with buried superlattice layer to reduce crosstalk | Yi-Ann Chen, Abid Husain | 2019-05-28 |
| 10249745 | Method for making a semiconductor device including a resonant tunneling diode structure having a superlattice | Robert J. Mears, Marek Hytha | 2019-04-02 |
| 10170603 | Semiconductor device including a resonant tunneling diode structure with electron mean free path control layers | Robert J. Mears, Marek Hytha | 2019-01-01 |
| 10170604 | Method for making a semiconductor device including a resonant tunneling diode with electron mean free path control layers | Robert J. Mears, Marek Hytha | 2019-01-01 |