Issued Patents 2019
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10523344 | Periodic calibration for communication channels by drift tracking | Frederick A. Ware, Richard E. Perego | 2019-12-31 |
| 10482275 | Implementing access control by system-on-chip | Jean-Michel Cioranesco, Rodrigo Portella do Canto, Guilherme Ozari de Almeida | 2019-11-19 |
| 10447465 | Signaling system with adaptive timing calibration | Bret G. Stott, Frederick A. Ware | 2019-10-15 |
| 10382193 | Performing cryptographic data processing operations in a manner resistant to external monitoring attacks | Sami James Saab, Pankaj Rohatgi | 2019-08-13 |
| 10381067 | Memory system topologies including a buffer device and an integrated circuit memory device | Ian Shaeffer, Ely Tsern | 2019-08-13 |
| 10366045 | Flash controller to provide a value that represents a parameter to a flash memory | Mark A. Horowitz, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe | 2019-07-30 |
| 10331379 | Memory controller for micro-threaded memory operations | Frederick A. Ware, Wayne S. Richardson, Chad A. Bellows, Lawrence Lai | 2019-06-25 |
| 10320496 | Periodic calibration for communication channels by drift tracking | Frederick A. Ware, Richard E. Perego | 2019-06-11 |
| 10305674 | Communication channel calibration for drift conditions | Frederick A. Ware, Richard E. Perego | 2019-05-28 |
| 10241940 | Memory module with reduced read/write turnaround overhead | Frederick A. Ware | 2019-03-26 |
| 10236051 | Memory controller | Frederick A. Ware, Ely Tsern, Richard E. Perego | 2019-03-19 |
| 10191866 | Memory controller for selective rank or subrank access | Frederick A. Ware | 2019-01-29 |
| 10192609 | Memory component with pattern register circuitry to provide data patterns for calibration | Richard E. Perego, Stefanos Sidiropoulos, Ely Tsern, Frederick A. Ware | 2019-01-29 |