VC

Vamsee Vardhan Chivukula

IN Intel: 2 patents #1,296 of 5,769Top 25%
📍 Folsom, CA: #77 of 296 inventorsTop 30%
🗺 California: #14,923 of 67,890 inventorsTop 25%
Overall (2019): #109,876 of 560,194Top 20%
2
Patents 2019

Issued Patents 2019

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10424107 Hierarchical depth buffer back annotaton Vasanth Ranganathan, Saikat Mandal, Saurabh Sharma, Karol A. Szerszen, Aleksander Olek Neyman +7 more 2019-09-24
10319138 Graphics with early stencil test Vasanth Ranganathan, Saikat Mandal, Prasoonkumar Surti, Abhishek R. Appu, Andrew S. Downsworth +4 more 2019-06-11