GT

Gurvinder Tiwana

IN Intel: 1 patents #2,309 of 5,769Top 45%
📍 Toronto, CA: #385 of 1,291 inventorsTop 30%
Overall (2019): #454,256 of 560,194Top 85%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10175734 Techniques for adjusting latency of a clock signal to affect supply voltage Mark Bourgeault 2019-01-08