Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10387324 | Method, apparatus, and system for efficiently handling multiple virtual address mappings during transactional execution canceling the transactional execution upon conflict between physical addresses of transactional accesses within the transactional execution | Paul Caprioli | 2019-08-20 |
| 10209989 | Accelerated interlane vector reduction instructions | Paul Caprioli, Jeffrey J. Cook, Muawya M. Al-Otoom | 2019-02-19 |