Jagdeep Bal — 2 Patents in 2019

ITIntegrated Device Technology: 2 patents #16 of 85Top 20%

Saratoga, CA: #220 of 728 inventorsTop 35%

California: #14,923 of 67,890 inventorsTop 25%

Overall (2019): #163,823 of 560,194Top 30%

2 Patents 2019

Issued Patents 2019

Showing 1–2 of 2 patents

Patent #	Title	Co-Inventors	Date
10261539	Separate clock synchronous architecture	Ron Wade	2019-04-16
10264542	Wirelessly synchronized clock networks	Elie Ayache, Eduard Van Keulen	2019-04-16