Issued Patents 2019
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10430264 | Monitoring correctable errors on a bus interface to determine whether to redirect input/output (I/O) traffic from a first processing unit to a second processing unit | Matthew G. Borlick, Lokesh M. Gupta | 2019-10-01 |
| 10394713 | Selecting resources to make available in local queues for processors to use | Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta | 2019-08-27 |
| 10387218 | Lock profiling tool to identify code bottlenecks in a storage controller | Louis A. Rasor | 2019-08-20 |
| 10379943 | Management of foreground and background processes in a storage controller | Matthew G. Borlick, Lokesh M. Gupta, Karl A. Nielsen | 2019-08-13 |
| 10346317 | Determining cores to assign to cache hostile tasks | Matthew G. Borlick, Lokesh M. Gupta | 2019-07-09 |
| 10318156 | Invoking input/output (I/O) threads on processors to demote tracks from a cache | Kevin J. Ash, Matthew G. Borlick, Lokesh M. Gupta | 2019-06-11 |
| 10275280 | Reserving a core of a processor complex for a critical task | Matthew G. Borlick, Lokesh M. Gupta, Clint A. Hardy | 2019-04-30 |
| 10255223 | Detecting a type of storage adapter connected and miscabling of a microbay housing the storage adapter | Gary W. Batchelor, Enrique Q. Garcia, Jay T. Kirch, Todd C. Sorenson | 2019-04-09 |
| 10248464 | Providing additional memory and cache for the execution of critical tasks by folding processing units of a processor complex | Matthew G. Borlick, Lokesh M. Gupta | 2019-04-02 |
| 10248457 | Providing exclusive use of cache associated with a processing entity of a processor complex to a selected task | Matthew G. Borlick, Lokesh M. Gupta, Clint A. Hardy | 2019-04-02 |
| 10228985 | Adjustment of a sleep duration for a process based on an expected time for securing a spinlock | Seamus J. Burke, Louis A. Rasor | 2019-03-12 |
| 10223164 | Execution of critical tasks based on the number of available processing entities | Matthew G. Borlick, Lokesh M. Gupta | 2019-03-05 |
| 10204060 | Determining memory access categories to use to assign tasks to processor cores to execute | Matthew G. Borlick, Lokesh M. Gupta, Matthew J. Kalos | 2019-02-12 |
| 10185593 | Balancing categorized task queues in a plurality of processing entities of a computational device | Seamus J. Burke, Louis A. Rasor | 2019-01-22 |
| 10176101 | Allocate a segment of a buffer to each of a plurality of threads to use for writing data | Herve G. P. Andre, Juan J. Ruiz | 2019-01-08 |
| 10169248 | Determining cores to assign to cache hostile tasks | Matthew G. Borlick, Lokesh M. Gupta | 2019-01-01 |