Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10446255 | Reference voltage calibration in memory during runtime | Diyanesh B. Chinnakkonda Vidyapoornachary, Edgar R. Cordero, Jeremy R. Neaton, Saravanan Sethuraman | 2019-10-15 |
| 10289578 | Per-DRAM and per-buffer addressability shadow registers and write-back functionality | John S. Bialas, Jr. | 2019-05-14 |
| 10261856 | Bitwise sparing in a memory system | Frank LaPietra, Kevin M. Mcilvain, Jeremy R. Neaton, Richard D. Wheeler | 2019-04-16 |