Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10403590 | Multilayer pillar for reduced stress interconnect and method of making same | Virendra R. Jadhav, Kamalesh K. Srivastava, Brian R. Sundlof | 2019-09-03 |
| 10396051 | Multilayer pillar for reduced stress interconnect and method of making same | Virendra R. Jadhav, Kamalesh K. Srivastava, Brian R. Sundlof | 2019-08-27 |