| 10521234 |
Concurrent multiple instruction issued of non-pipelined instructions using non-pipelined operation resources in another processing core |
Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs |
2019-12-31 |
| 10514753 |
Selectively applying reprojection processing to multi-layer scenes for optimizing late stage reprojection power |
Ryan Scott Haraden, Jeffrey Powers Bradford, Miguel Comparan, Gene Leung, Tolga Ozguner |
2019-12-24 |
| 10410349 |
Selective application of reprojection processing on layer sub-regions for optimizing late stage reprojection power |
Ryan Scott Haraden, Jeffrey Powers Bradford, Miguel Comparan, Gene Leung, Tolga Ozguner |
2019-09-10 |
| 10310998 |
Direct memory access with filtering |
Ryan Scott Haraden, Robert A. Shearer, Matthew R. Tubbs, Ashish Gupta |
2019-06-04 |
| 10261793 |
Instruction predication using instruction address pattern matching |
Mark J. Hickey, Matthew R. Tubbs, Charles D. Wait |
2019-04-16 |
| 10255891 |
No miss cache structure for real-time image transformations with multiple LSR processing engines |
Ryan Scott Haraden, Tolga Ozguner, Jeffrey Powers Bradford, Christopher Jon Johnson, Gene Leung +1 more |
2019-04-09 |
| 10242654 |
No miss cache structure for real-time image transformations |
Tolga Ozguner, Jeffrey Powers Bradford, Miguel Comparan, Gene Leung, Ryan Scott Haraden +1 more |
2019-03-26 |
| 10241470 |
No miss cache structure for real-time image transformations with data compression |
Tolga Ozguner, Gene Leung, Jeffrey Powers Bradford, Miguel Comparan, Ryan Scott Haraden +1 more |
2019-03-26 |
| 10181175 |
Low power DMA snoop and skip |
Ryan Scott Haraden, Matthew R. Tubbs, Robert A. Shearer |
2019-01-15 |