JC

Jiong Cao

SY Synopsys: 1 patents #61 of 330Top 20%
Overall (2019): #418,029 of 560,194Top 75%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10467368 Peak wirelength aware compiler for FPGA and FPGA-based emulation Etienne Lepercq, Jiahua Zhu, Marc-Andre Daigneault 2019-11-05