Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10338930 | Dual-rail delay insensitive asynchronous logic processor with single-rail scan shift enable | Bryan Cope | 2019-07-02 |
| 10205453 | Self-timed processors implemented with multi-rail null convention logic and unate gates | Chao Xu, Gopal Raghavan, Vidura Manu Wijayasekara, Bryan Cope, David Cureton Baker +1 more | 2019-02-12 |