VG

Vassilios Gerousis

CS Cadence Design Systems: 1 patents #113 of 394Top 30%
IV Imec Vzw: 1 patents #52 of 204Top 30%
📍 San Jose, CA: #1,646 of 6,652 inventorsTop 25%
🗺 California: #14,923 of 67,890 inventorsTop 25%
Overall (2019): #109,842 of 560,194Top 20%
2
Patents 2019

Issued Patents 2019

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10510774 Integrated circuit power distribution network Peter Debacker, Praveen Raghavan 2019-12-17
10192018 Method and system for implementing efficient trim data representation for an electronic design Shane Zhang, Jianmin Li, Stefanus Mantik, Louis Tsai 2019-01-29