Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10466766 | Grouping central processing unit memories based on dynamic clock and voltage scaling timing to improve dynamic/leakage power using array power multiplexers | Rajesh Arimilli, Bharat Kumar Rangarajan | 2019-11-05 |
| 10248558 | Memory leakage power savings | Bharat Kumar Rangarajan | 2019-04-02 |