Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10447249 | Hold violation free scan chain and scanning mechanism for testing of synchronous digital VLSI circuits | Sarma Vrudhula | 2019-10-15 |
| 10250236 | Energy efficient, robust differential mode d-flip-flop | Sarma Vrudhula, Jinghua Yang | 2019-04-02 |