Issued Patents 2018
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10084466 | Top plate sampling circuit including input-dependent dual clock boost circuits | Neeraj Shrivastava, Arun Mohan | 2018-09-25 |
| 9941893 | Pattern based estimation of errors in ADC | Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan +3 more | 2018-04-10 |