RG

Reiner Wilhelm Genevriere

SY Synopsys: 1 patents #39 of 172Top 25%
📍 San Jose, CA: #2,540 of 5,991 inventorsTop 45%
🗺 California: #23,431 of 60,411 inventorsTop 40%
Overall (2018): #267,098 of 503,207Top 55%
1
Patents 2018

Issued Patents 2018

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10157253 Multi-bit-mapping aware clock gating Peter Wilhelm Josef Zepter, Wladimir Alejandro Plagges Martinez 2018-12-18