| 10146576 |
Method for executing multithreaded instructions grouped into blocks |
— |
2018-12-04 |
| 10042643 |
Guest instruction to native instruction range based mapping using a conversion look aside buffer of a processor |
— |
2018-08-07 |
| 10013254 |
Systems and methods for load cancelling in a processor that is connected to an external interconnect fabric |
Karthikeyan Avudaiyappan |
2018-07-03 |
| 9990200 |
Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines |
— |
2018-06-05 |
| 9965281 |
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer |
— |
2018-05-08 |
| 9934072 |
Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines |
— |
2018-04-03 |
| 9934042 |
Method for dependency broadcasting through a block organized source view data structure |
— |
2018-04-03 |
| 9921850 |
Instruction sequence buffer to enhance branch prediction efficiency |
— |
2018-03-20 |
| 9921845 |
Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
— |
2018-03-20 |
| 9891915 |
Method and apparatus to increase the speed of the load access and data return speed path using early lower address bits |
Ravishankar Rao |
2018-02-13 |
| 9886416 |
Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
— |
2018-02-06 |
| 9858080 |
Method for implementing a reduced size register view data structure in a microprocessor |
— |
2018-01-02 |