Issued Patents 2018
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10164657 | Systems and methods for differential message scaling in a decoding process | Yu Cai, Erich F. Haratsch, Ning Chen | 2018-12-25 |
| 10157096 | Hot-read data aggregation and code selection | Yu Cai, Erich F. Haratsch | 2018-12-18 |
| 10153782 | Error correction code (ECC) selection using probability density functions of error correction capability in storage controllers with multiple error correction codes | Yu Cai, Erich F. Haratsch | 2018-12-11 |
| 10153052 | Flash command that reports a count of cell program failures | Yu Cai, Erich F. Haratsch | 2018-12-11 |
| 10073734 | Flash memory read error recovery with soft-decision decode | Erich F. Haratsch, Jeremy Werner, Zhengang Chen, Earl T. Cohen, Ning Chen | 2018-09-11 |
| 10019313 | Flash channel with selective decoder likelihood dampening | Zhengang Chen, AbdelHakim S. Alhussien, Erich F. Haratsch | 2018-07-10 |
| 10020066 | Systems and methods for sub-zero threshold characterization in a memory cell | Yu Cai, Erich F. Haratsch | 2018-07-10 |
| 9990247 | Write mapping to mitigate hard errors via soft-decision decoding | AbdelHakim S. Alhussien, Erich F. Haratsch, Earl T. Cohen | 2018-06-05 |
| 9954559 | Fixed point conversion of LLR values based on correlation | Yu Cai, Erich F. Haratsch | 2018-04-24 |
| 9941901 | Systems and methods for soft decision generation in a solid state memory system | Zhengang Chen, Erich F. Haratsch | 2018-04-10 |
| 9940980 | Hybrid LPDDR4-DRAM with cached NVM and flash-nand in multi-chip packages for mobile devices | Xiaobing Lee, Feng-Cheng Yang, Yu Meng | 2018-04-10 |
| 9922718 | Flash command that reports a count of cell program failures | Yu Cai, Erich F. Haratsch | 2018-03-20 |
| 9916906 | Periodically updating a log likelihood ratio (LLR) table in a flash memory controller | Yu Cai, Zhengang Chen, Erich F. Haratsch | 2018-03-13 |