Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10032908 | Multi-gate vertical field effect transistor with channel strips laterally confined by gate dielectric layers, and method of making thereof | Christopher J. Petti, Juan Saenz, Guangle Zhou, Abhijit Bandyopadhyay, Tanmay Kumar | 2018-07-24 |
| 9922709 | Memory hole bit line structures | Christopher J. Petti, Tianhong Yan | 2018-03-20 |
| 9859337 | Three-dimensional memory device with vertical semiconductor bit lines located in recesses and method of making thereof | Abhijit Bandyopadhyay, Christopher J. Petti | 2018-01-02 |