Issued Patents 2018
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10074609 | Layout construction for addressing electromigration | Animesh Datta, Ohsang Kwon | 2018-09-11 |
| 9990984 | Pulse-stretcher clock generator circuit for high speed memory subsystems | Dorav Kumar, Venkat Narayanan, Bilal Zafar, Venugopal Boynapalli | 2018-06-05 |
| 9979381 | Semi-data gated flop with low clock power/low internal power with minimal area overhead | Xiangdong Chen, Venugopal Boynapalli | 2018-05-22 |
| 9972624 | Layout construction for addressing electromigration | Michael Brunolli, Christine Hau-Riege, Mickael Malabry, Sucheta Kumar Harish, Prathiba Balasubramanian +4 more | 2018-05-15 |
| 9859891 | Standard cell architecture for reduced parasitic resistance and improved datapath speed | Dorav Kumar, Venkatasubramanian Narayanan, Bala Krishna Thalla, Radhika Vinayak Guttal, Sivakumar Paturi | 2018-01-02 |