Issued Patents 2018
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9934342 | Clock gating verification during RTL stage of integrated circuit design | Yifeng Liu, Lei Ji | 2018-04-03 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9934342 | Clock gating verification during RTL stage of integrated circuit design | Yifeng Liu, Lei Ji | 2018-04-03 |