Issued Patents 2018
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10102329 | Method and apparatus for validating a test pattern | Yoav Miller, Sergey Sofer | 2018-10-16 |
| 9977849 | Method and apparatus for calculating delay timing values for an integrated circuit design | Sergey Sofer, Michael Priel | 2018-05-22 |
| 9903916 | Scan test system with a test interface having a clock control unit for stretching a power shift cycle | Sergey Sofer, Michael Priel | 2018-02-27 |