Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10153769 | Systems, processes and computer-accessible medium for providing logic encryption utilizing fault analysis | Ozgur Sinanoglu, Youngok Pino, Jeyavijayan Rajendran | 2018-12-11 |
| 10083303 | System, method and computer-accessible medium for security verification of third party intellectual property cores | VIVEKANANDA VEDULA, Jeyavijayan Rajendran, ARUNSHANKAR DHANDAYUTHAPANY | 2018-09-25 |
| 10073728 | System, method and computer-accessible medium for fault analysis driven selection of logic gates to be camouflaged | Jeyavijayan Rajendran, Ozgur Sinanoglu | 2018-09-11 |