Issued Patents 2018
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10083930 | Semiconductor device reducing parasitic loop inductance of system | Huaifeng Wang, Hunt Hang Jiang, Francis Yu | 2018-09-25 |
| 10069422 | Synchronous switching converter and associated integrated semiconductor device | Huaifeng Wang | 2018-09-04 |
| 9941171 | Method for fabricating LDMOS with reduced source region | Ji-Hyoung Yoo, Joel M. McGregor | 2018-04-10 |
| 9892787 | Multi-time programmable non-volatile memory cell and associated circuits | Da Chen | 2018-02-13 |
| 9893146 | Lateral DMOS and the method for forming thereof | Joel M. McGregor, Jeesung Jung, Ji-Hyoung Yoo | 2018-02-13 |
| 9893518 | ESD protection circuit with false triggering prevention | — | 2018-02-13 |