DZ

Dalong Zhao

ML Mie Fujitsu Semiconductor Limited: 2 patents #5 of 28Top 20%
📍 San Jose, CA: #1,359 of 5,991 inventorsTop 25%
🗺 California: #12,239 of 60,411 inventorsTop 25%
Overall (2018): #154,498 of 503,207Top 35%
2
Patents 2018

Issued Patents 2018

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10014387 Semiconductor structure with multiple transistors having various threshold voltages Teymur Bakhishev, Lance Scudder, Paul E. Gregory, Michael Duane, U.C. Sridharan +3 more 2018-07-03
9991300 Buried channel deeply depleted channel transistor Teymur Bakhishev, Lingquan Wang, Pushkar Ranade, Scott E. Thompson 2018-06-05