Issued Patents 2018
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10153049 | Erasing memory segments in a memory block of memory cells using select gate control line voltages | Akira Goda | 2018-12-11 |
| 10147494 | Apparatus configured to program memory cells using an intermediate level for multiple data states | Carmine Miccoli, Akira Goda | 2018-12-04 |
| 9953718 | Programming memory cells to be programmed to different levels to an intermediate level from a lowest level | Carmine Miccoli, Akira Goda | 2018-04-24 |