SR

Sowmyan Rajagopalan

📍 Pontypool, GB: #1 of 3 inventorsTop 35%
Overall (2018): #56,815 of 503,207Top 15%
3
Patents 2018

Issued Patents 2018

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
10108770 Corner process for analog circuit design optimization Christopher M. Yates 2018-10-23
10055527 Yield process for analog circuit design optimization Christopher M. Yates 2018-08-21
10025897 Generation of circuit design populations for analog circuit design optimization Christopher M. Yates 2018-07-17