Issued Patents 2018
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157059 | Instruction and logic for early underflow detection and rounder bypass | Thierry Pons, Zeev Sperber, Amit Gradstein | 2018-12-18 |
| 10095516 | Vector multiplication with accumulation in large register space | Shay Gueron, Vlad Krasnov, Robert Valentine, Zeev Sperber, Amit Gradstein | 2018-10-09 |
| 10089076 | Floating point scaling processors, methods, systems, and instructions | Cristina S. Anderson, Amit Gradstein, Robert Valentine, Benny Eitan | 2018-10-02 |
| 10073695 | Floating point round-off amount determination processors, methods, systems, and instructions | Cristina S. Anderson, Bret L. Toll, Robert Valentine, Amit Gradstein | 2018-09-11 |
| 9996320 | Fused multiply-add (FMA) low functional unit | Cristina S. Anderson, Marius Cornea-Hasegan, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal +5 more | 2018-06-12 |
| 9996319 | Floating point (FP) add low instructions functional unit | Cristina S. Anderson, Marius Cornea-Hasegan, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal +5 more | 2018-06-12 |
| 9929745 | Apparatus and method for vector compression | David M. Russinoff, Amit Gradstein, John W. O'Leary, Zeev Sperber | 2018-03-27 |
| 9921807 | Floating point scaling processors, methods, systems, and instructions | Cristina S. Anderson, Amit Gradstein, Robert Valentine, Benny Eitan | 2018-03-20 |