Issued Patents 2018
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10127015 | Decimal multiply and shift instruction | Jonathan D. Bradbury, Steven R. Carlough, Reid T. Copeland | 2018-11-13 |
| 10101967 | Zero detection of a sum of inputs without performing an addition | Michael K. Kroener, Manuela Niekisch, Kerstin Claudia Schelm | 2018-10-16 |
| 10095475 | Decimal and binary floating point rounding | Steven R. Carlough, Klaus M. Kroener, Petra Leber, Cedric Lichtenau | 2018-10-09 |
| 10067744 | Overflow detection for sign-magnitude adders | Petra Leber, Cedric Lichtenau | 2018-09-04 |
| 9959093 | Binary fused multiply-add floating-point calculations | Michael Klein, Klaus M. Kroener, Cedric Lichtenau | 2018-05-01 |
| 9952829 | Binary fused multiply-add floating-point calculations | Michael Klein, Klaus M. Kroener, Cedric Lichtenau | 2018-04-24 |
| 9940199 | Checking arithmetic computations | Steven R. Carlough, Cedric Lichtenau | 2018-04-10 |
| 9928135 | Non-local error detection in processor systems | Steven R. Carlough, James R. Cuffney, Michael Klein | 2018-03-27 |
| 9870200 | Decimal and binary floating point rounding | Steven R. Carlough, Klaus M. Kroener, Petra Leber, Cedric Lichtenau | 2018-01-16 |