Issued Patents 2018
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10033518 | Data on clock lane of source synchronous links | Tapas Nandy | 2018-07-24 |
| 10027333 | Phase locked loops having decoupled integral and proportional paths | Abhirup Lahiri, Gagan Midha | 2018-07-17 |